The present invention relates to digital to analogue converters (DACs). In particular, the invention relates to DACs for applications where high DAC linearity is required, for example, in multi-level xcexa3-xcex94 modulators.
DACs use elements (components) having weighting values and these elements are selected to produce an output corresponding to the input. The elements selected are summed to produce the output. DAC non-linearity arises because each element has an actual value which is slightly different to its nominal value. This difference may be due to mismatches introduced during the fabrication process. Non-linearity gives rise to distortion.
One known method of correcting for DAC non-linearity uses dynamic element matching (DEM). A known DEM based system 10 is shown in FIG. 1. In the DEM based system 10, a digital pulse code modulation (PCM) sequence on input 12 is decomposed by the DEM system 14 into a plurality of output sequences associated with DEM outputs 16. DEM outputs 16 are used to drive multiple DAC elements 18 whose outputs are summed to provide an analogue signal on output 20. The sum of these output sequences 16 is always equal to the input sequence at every sample instant.
The signal on each DEM output 16 can be either of two levels: one level indicating that the associated DAC element 18 is used, the other level indicating that the associated DAC element 18 is not used; alternatively, one level indicates that the associated DAC element 18 is used in a positive sense, the other level indicates that the associated DAC element 18 is used in a negative sense.
Each DAC element 18 has the same nominal weighting, and the desired analogue signal on output 20 is obtained by using different combinations of the DAC elements 18 (shuffling the DAC elements). This ensures that any errors are randomised, that is, they become noise-like. The DEM system 14 determines the optimum output sequence, which is the sequence having a frequency spectrum with the lowest low frequency power other than that associated with the input digital sequence on signal 12, by using selection logic.
One problem with this technique is that many DAC elements are required to reproduce a large input value and to minimise errors by randomising.
It is an object of the present invention to obviate or mitigate the above disadvantage.
According to a first aspect of the present invention there is provided a digital to analogue converter system comprising:
a plurality of digital to analogue converter elements, where at least some of the elements have a different nominal weight to other elements, and elements having the same nominal weight are associated to form element combinations, each element combination having more than two output states;
a selection unit coupled to the digital to analogue converter elements; and
an adder to sum the weighted elements;
whereby, in use, the digital to analogue converter system receives a digital signal and the selection unit determines the output state of each element combination to provide values of weighted elements which, when summed, are equivalent to the digital signal and the selection unit also determines the output state of each element in each element combination to minimise errors.
Preferably, the selection unit is a vector quantiser.
The selection unit may operate according to known techniques, such as the addition technique as described in reference 1 on pages 47 to 50 (see appendix), or the rotation approach as described in reference 1 on pages 46 and 47. The selection unit may determine the output state of each element combination in such a way that the errors average to zero over multiple sample instances.
The selection unit may introduce a dither signal to randomise the selection of the output state of each element.
Preferably, element combinations consist of pairs of elements, thereby providing element combinations with three output states.
Preferably, one of each pair of elements has a positive value and the other of each pair of elements has a negative value. Alternatively, one of each pair of elements has a value of zero and the other of each pair of elements has a positive non-zero value.
Preferably, the elements in each element combination have a binary weight value. Alternatively, any other convenient system of weight values may be used.
Preferably, the selection unit minimises low frequency errors. Alternatively, the selection unit minimises errors in another frequency range, such as high frequency.
It will be appreciated that a digital to analogue converter system as set forth above may be used on its own or it may be incorporated in an application which uses a DAC, for example, an oversampled DAC or a sigma-delta based DAC.
According to a second aspect of the present invention there is provided an analogue to digital converter (ADC) comprising:
a subtractor for receiving a main analogue input and a feedback analogue input, and for producing an output equal to the difference between the main input and the feedback input;
an analogue loop filter coupled to the output of the subtractor;
a quantiser coupled to the output of the analogue loop filter; and
a DAC according to the first aspect of the invention;
where the DAC is located in a feedback loop such that the input to the DAC is coupled to the output of the quantiser and the output of the DAC is coupled to the feedback analogue input, whereby, in use, an analogue signal applied to the main input is continuously compared with the signal on the feedback input so that the signal on the output of the quantiser is minimised.
It will be appreciated that the above system may be used with an oversampled multibit analogue to digital converter (ADC).
According to a third aspect of the present invention there is provided a method of converting a digital signal to a corresponding analogue signal, the method comprising the steps of:
providing a digital to analogue converter having a plurality of digital to analogue converter elements, where at least some of the elements have a different nominal weight to other elements and elements having the same nominal weight are associated to form element combinations, each element combination having more than two output states;
receiving a digital signal;
determining the output states for each element combination;
determining for each element combination the output state of each element so that when summed with other elements in the element combination the output state for each element combination is correct and errors are minimised;
whereby, when all of the elements are summed an analogue signal is produced which corresponds to the input digital signal.
It will be appreciated that the present invention has the advantage that there are a number of possible ways to combine the available element combinations to produce a value equivalent to the digital signal, so that the selection unit can choose element values which produce the lowest error. The present invention also has the advantage that elements having different weight values are used so that large output values can be produced using fewer elements than is possible using the known method of having identical unit value elements. The reduced element requirement means that there are fewer components to switch, there is less complexity, and consequently parasitic effects are reduced.